SERIAL INTERFACE

FEATURES

• Channel 1 and 2 Serial Interfaces
  • Synchronous Serial Interface (SSI)
    • Non-burst reads and writes
    • Configurable data, address lengths
    • Programmable direction bit / address ordering
    • Independent disables for direction bit and address
  • Interrupts/Status Information
    • Status bits: completion of SSI transfer, busy
    • Interrupt bits: buffer overflow, underflow, depth
    • Masked and unmasked interrupt bits
• Channel 0 Serial Interface
  • Synchronous Serial Interface (SSI)
    Same as channel 1 and 2 serial interface features, plus:
    • Burst reads/writes
    • Configurable burst lengths
    • Three different types of read/write bursts
    • Automatic burst address incrementing with programmable burst address increment value
    • 16-entry FIFO for serial burst transfers
    • Programmable servo burst start address for automatic servo burst acquisition
    • Servo burst value acquisition can interrupt SSI transfer
    • SSI transfer resumes automatically if interrupted by servo transfer
  • Single-bit Burst Serial (SBBS) Interface
    • Burst reads only
    • Configurable data and burst lengths
    • Programmable number of leading (ignored) strobes
  • Burst Acquisition
    • Can use SSI or SBBS for burst acquisition
    • 6 burst registers
  • Interrupts/Status Information
    Same as channel 1 and 2 serial interface features, plus:
    • Status bits: FIFO depth
    • Interrupt bits: FIFO overflow and underflow, Burst register overflow and underflow, address overflow

SYSTEM OVERVIEW

The Serial block is designed to provide three communication channels under firmware control to three external blocks. Channel 0 can be used to transfer in burst mode.

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